Crossbar’s ReRAM technology is based on a simple device structure using CMOS friendly materials and standard manufacturing process. It can be easily integrated and manufactured into existing CMOS fabs without any special equipment or materials. As it is a low temperature Back-End-Of-Line process integration, multiple layers of Crossbar ReRAM arrays can be integrated on top of CMOS logic wafers building a 3D ReRAM storage chips.
Crossbar’s ReRAM cell operation is based on the storage of a metallic filament in a non-conductive layer compared to electron storage in a Flash memory cell. A few electron loss causes a reliability issue, retention and cycling become a challenge. This is the reason why Flash memory performance degrades in small process geometries. Crossbar’s ReRAM scaling does not impact the device performance and has potential for sub 10nm scaling.
The versatility of Crossbar’s ReRAM technology exhibits broad range of device characteristics that enables several new classes of storage solutions. The built-in select feature of Crossbar’s ReRAM cell allows various memory array configurations where a single transistor can drive one or thousands of memory cells resulting in flexible design possibilities depending on the targeted applications: fast read access for embedded code storage and direct execution by processors or high-density low latency access for data storage applications.
Crossbar ReRAM technology delivers 100x lower read latency and 20x faster write performance compared to NAND Flash and doesn’t have the Flash design constraint to build memory arrays in large blocks that can be independently but atomically erased. Crossbar’s ReRAM technology can be architected with small pages that can be independently erased or re-programmed. This new storage architecture simplifies drastically the complexity of the storage controller by removing a large portion of the background memory accesses required for garbage collection. With a Write Amplification equals to 1, the benefits to the users are visible in terms of read and write latencies, lower energy consumption and increased lifetime of the storage solutions.
With that breakthrough performance and reliability, very high capacity, low power consumption and tunability to multiple storage architectures, Crossbar will enable a new wave of electronics innovation for consumer electronics, enterprise storage, mobile computing, industrial/automotive/medical, connected devices and wearable device applications.
In order to maintain acceptable performance characteristics at the user-level, storage systems designers for solid state drives (SSDs) have had to develop complex architectures and algorithms to work around the inherent design limitations of 3D MLC/TLC NAND Flash. As NAND manufacturers attempt to scale down to reduce cost, the complex system of workarounds has impacted performances in real-life use-cases, causing major system bottlenecks visible in SSD benchmarks.
NAND Flash program operation is slow and is done at the granularity of a large page size. Current MLC/TLC NAND or 3D NAND Flash need about 600µs to 1ms to program a 8 to 16Kbytes page. As this is too slow to be accepted by typical use-cases, every program operation has to been re-oriented first to a write buffer in a temporary location, a SRAM or DRAM buffer or a NAND partition configured in SLC mode.
NAND Flash has to be erased prior to being programmed. The NAND erase operation is slow, in the 10ms range and is done for a very large block size, 4-8Mbytes. To overcome this critical design limitation, a Logic to Physical (L2P) mapping is managed by the SSD controller to keep track of original and revised data locations and enable the delaying block erase operations until necessary.
The Garbage Collection is an additional layer of data management required to properly free-up blocks with obsolete data when storage is idle. The problem occurs when a new request is coming while the garbage collection is moving data from blocks to blocks. This typical penalty introduces long and undeterministic latencies in the range of seconds.
Consequently, for one single write to a SSD, this is common to see several background memory operations between the SSD controller, the NAND Flash and DRAM components. This is called the Write Amplification (WA) and it measures the efficiency of the controller. Most systems typically have WA somewhere between 3 and 4. Higher WA directly affects the reliability and performance of the storage device, since it amplifies the number of writes to the device, bringing a cell to its maximum cycles that much faster. This is especially relevant at smaller technology nodes, where the maximum cycle of a NAND memory cell decreases to below three thousand program cycles.
These complex work-arounds drastically impact the end-user experience and explain the different performances measured on SSD benchmarks compared to SSD specifications provided by SSD manufacturers. In case of sequential writes, for example when a user wants to download a high-resolution movie from the network to a local media storage, or when SSD are extensively used like in an enterprise storage environment, these work-arounds cannot hide the intrinsic design limitations of the NAND Flash technology.
Crossbar’s ReRAM technology does not require any erase operation prior to being programmed. A single write to a ReRAM can be done very fast, and at a small page granularity. Next-generation SSD controllers optimized for ReRAM will be able to update smaller pages faster and drastically reduce the background memory operations required for NAND. ReRAM-based SSD will provide lower and more deterministic read latencies, in the range of tens of us.
Crossbar’s patented selector device solves one of the greatest technical challenges faced by developers of high-density ReRAM called the sneak current (or leakage current). Crossbar’s 3D ReRAM storage solutions are based on 1TnR arrays (1 Transistor driving n Resistive memory cell), selectivity making it possible for a single transistor to manage a very large number of interconnected memory cells, which enables very high capacity solid-state storage. While 1TnR enables a single transistor to drive over 2,000 memory cells with very low power, it also experiences leakage of a sneak path current that interferes with the performance and reliability of a typical ReRAM array. Crossbar’s patented field assisted superlinear threshold selector device solves that leakage problem by utilizing a super linear threshold layer, in which a volatile conduction path is formed at the threshold voltage. This field assisted superlinear threshold device is the industry’s first selector capable of suppressing the leakage current below 0.1nA and has been successfully demonstrated in a 4 Mbit integrated 3D stackable passive Crossbar array.
Demonstrated at IEDM in late 2014, Crossbar’s selector solves the sneak path problem by achieving the highest reported selectivity of 1010, as well as an extremely sharp turn-on slope of less than 5mV/dec, fast turn-on and recovery (<50ns), an endurance greater than 100M cycles, and a processing temperature less than 300°C, all ensuring commercial viability. Crossbar’s selector is the first solution to overcome this design challenge, paving the way for terabyte storage-on-a-chip to become a reality and positioning ReRAM as the leading next generation NAND memory replacement
Crossbar’s ReRAM technology will simplify the management of data writes and data reads between the multiple data storage components and the controller within a SSD or other similar data storage solution. Reducing the number of background memory operations improves the performance and overall endurance of the data storage solution but also reduces the overall power consumption of both the SSD controller, the DRAM usage and the read and write power budget consumed by the data storage components.
At the memory cell level, Crossbar’s ReRAM improves programing performance and power consumption by achieving a 64pJ/cell program energy, a 20X improvement compared to NAND Flash technology.
Manufacturability & Scalability
Crossbar’s ReRAM, involving simple two-terminal device, can be integrated into back-end metal layers to provide an elegant and low-cost solution as the most viable alternative to NAND Flash solutions. There is no question that planar MLC/TLC NAND is facing scaling challenges and performance degradation at the 1y nm node. While 3D NAND starting at 2x nm is considered to be an alternative to planar NAND, 3D NAND technology will suffer from the same scalability challenges and performance degradation when it migrates to the 1x nm node.
From a cell perspective, resistive memory elements boast the same on-current as the device area is scaled down, but have reduced off-currents. On/off current ratios, from a few hundred to more than a thousand, are typical. This also improves the sensing margin, enabling both sensing with less complicated CMOS peripheral circuitry and the ability to do MLC/TLC at smaller technology nodes. Crossbar’s ReRAM filament-based resistive memory elements enable cells to be scaled to sub-10nm sizes.
Two fab process parameters are critical to the device – the thickness of the switching layer film (TSL), and the critical dimension (CD) over which the switching phenomenon occurs. Both of these are easily controlled with current state-of-the-art manufacturing tools for lithography, PECVD film deposition, and metal etch tools in today’s 20 to 40 nm node fabs.
Crossbar’s ReRAM can use the same equipment set currently used in manufacturing the peripheral CMOS-based circuits and the memory element can be implemented at low temperatures. The thermal budget of the ReRAM implementation does not impact the CMOS. And depending on the type of memory, ReRAM layers can typically survive the thermal budget up to 16 stacks without showing significant changes to device performance. 3D ReRAM stacking is totally different from 3D NAND stacking and can be done very easily using backend integration.
- ReRAM Overview
- ReRAM Advantages
- ReRAM: The Future Technology for NAND Flash
- Sneak Path Breakthrough
- Overcoming Challenges in 3D Memory Production
- High Capacity, High-Performance Non-Volatile Memory