The Cramium line of Secure Processing Units (SPU) utilizes unique resistive RAM technology for their secure, non-volatile storage and processing, which is inherently more secure than other incumbent technologies such as charge-based. This memory, embedded in the semiconductor, is resistant to reverse engineering of data and physical attacks, which are essential requirements for today’s secure systems and applications.
Due to its structure, the ReRAM cell itself is inherently resistant to physical hacking targeting sensitive information and data stored in memory. It is not feasible to externally read the physical ReRAM cell electrically, magnetically or through imaging techniques even after delamination of the silicon. Also, the ReRAM cell is fabricated vertically in the silicon, is located between layers of metal, and has a very small cross-sectional area, making it virtually impossible to measure its resistance in an attempt to read its stored contents. When the ReRAM PUF cell (Physical Unclonable Function) is used, it possesses many of the same secure characteristics as the memory. The Cramium line of products uses a version of ReRAM that utilizes stochastic electro-chemical ionic movement that is more difficult to analyze or useful for inferring the contents of the memory. The ReRAM-based cell microstructure changes are unclonable, and unlikely to be detected using invasive techniques such as FIB (Focused Ion Beam), SEM (Scanning Electron Microscopy) or TEM (Transmission Electron Microscopy) sampling.
The Cramium line of SPUs enables a new class of secure computing, addressing many of the deficiencies of alternative implementations.
| Flash (Charge Based) | ReRAM (Resistance Based) | |
|---|---|---|
| Security | Data inferred by electrical and/or physical hacking techniques | Cannot be inferred |
| Permanence | Charge leaks, eventually causing data loss; also affected by radiation, especially at higher altitudes including in airplanes | Metal-based, 100+ years shelf-life at room temperature; radiation tolerance |
| Integration | Not available for integration with advanced logic below 28nm | Can be integrated with advanced logic below 28nm |
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